FX Series Programmable Controlers Applied Instructions 5
5-56
b) If more than one hi
h speed counter function is used for a sin
le counter the selected fla
devices (D) should be kept within 1
roup of 8 devices, i.e. Y0-7, M10-17.
c) All hi
h speed counter functions use an interrupt process, hence, all destination devices (D)
are updated immediatel
.
5.6.5 HSCR (FNC 54)
Operation:
The HSCR, compares the current value of the
selected hi
h speed counter (S
2
) a
ainst a
selected value (S
1
). When the counters current
value chan
es to a value equal to S
1
, the device
specified as the destination (D) is reset. In the example above, Y10 would be reset onl
when
C255’s value stepped from 199 to 200 or from 201 to 200. If the current value of C255 was
forced to equal 200 b
test techniques, output Y10 would
NOT
reset.
For further,
eneral points, about usin
hi
h speed counter functions, please see the
subsection ‘Points to note’ under the HSCS (FNC 53). Relevant points are; a, b, and c.
Please also reference the note about the number of hi
h speed instructions allowable.
Mnemonic Function
Operands
Program steps
S
1
S
2
D
HSCR
FNC 54
(Hi
h speed
counter
reset)
Resets the
selected output
when the
specified hi
h
speed counter
equals the test
value
K, H,
KnX, KnY,
KnM, KnS,
T, C, D, V, Z
C
Note:
C = C235 to
C255, or
available hi
h
speed
counters
Y, M, S
C
Note:
If C, use same
counter as S
2
DHSCR:
13 steps
Use of interrupt pointers
FX
(2C)
and FX
2N
MPUs can use interrupt pointers I010 throu
h I060 (6 points) as destination
devices (D). This enables interrupt routines to be tri
ered directl
when the value of the
specified hi
h speed counter reaches the value in the HSCS instruction.
Note:
FX
0
,FX
0N
users - Max. 4 simultaneousl
active HSCS/R instructions. FX users Max. 6
simultaneousl
active HSCS/R and HSZ instructions. Please remember that the use of hi
h
speed counter functions has a direct impact on the maximum allowable countin
speed! See
pa
e 4-22 for further details.
M8000
C255 Y10
[ S1 ] [ S2 ]
K200
[ D ]
DHSCR
