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Serial Controller Module
Register bit assignment
Bits Access Mnemonic Reset Description
D31:24 R/W RMMB1 0 Receive mask match byte 1
D23:16 R/W RMMB2 0 Receive mask match byte 2
D15:08 R/W RMMB3 0 Receive mask match byte 3
D07:00 R/W RMMB4 0 Receive mask match byte 4
Table 95: Serial Channel Receive Match MASK register bit definition
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
RMMB1 RMMB2
RMMB3 RMMB4