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SPRZ153
TMS320C6201 Silicon Errata
17
McBSP: DXR to XSR Copy Not Generated (Continued)
Example:
Configure the DMA as follows:
(a) For half-word/byte-size accesses with right justification on receive data:
– ch_A: /* for transmit */
src_address = mem_out; dst_address = DXR;
Element_size = WORDAddress_inc_mode = indexIndex_reg_value =
2 /* change this to 1 for byte writes */
– ch_B : /* for receive */
src_address = DRR; dst_address = mem_in;
Element_size = HALF /* change this to BYTE for 8-b element size
*/Address_inc_mode = inc_by_ element_size
/* inc_by_index whose value is as specified for ch_A above will
also work */
(b) For half-word / byte-size accesses with left justification on receive data:
– Same as 1(a) above EXCEPT for:
ch_B : /* for receive */
src_address = DRR+3; /* for byte accesses */ OR
= DRR+2; /* for half-word accesses */
2. For big-endian mode:
Always write 32 bits to the DXR.
(a) For half-word accesses with right justification on receive data:
– ch_A: /* for transmit */
src_address = mem_out;
dst_address = DXR+2; /* 0x018C0006 for McBSP0 or 0x01900006 for McBSP1 */
Element_size = WORD
Address_inc_mode = index
Index_reg_value = 2
– ch_B : /* for receive */
src_address = DRR+2 /* 0x018C0002 for McBSP0 or 0x01900002 for McBSP1 */
dst_address = mem_in;
Element_size = HALF;
Address_inc_mode = = inc_by_ element_size
/* inc_by_index whose value is as specified for ch_A above
will also work */
(b) For half-word writes with left justification on receive data:
– Same as 2(a) above EXCEPT for:
ch_B : /* for receive */
src_address = DRR;