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SPRZ153
TMS320C6201 Silicon Errata
3
Advisory 2.1.19 PMEMC: Branch from External to Internal 23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.1.21 DMA: DMA Data Block Corrupted After Start Zero Transfer Count 23. . . . . . . . . . . . . . . . . . . . . . . . . .
6 Silicon Revision 2.0 Known Design Exceptions to Functional Specifications 24. . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.0.1 Program Fetch: Cache Modes Not Functional 24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.0.2 Bootload: Boot from 16-Bit and 32-Bit Asynchronous ROMs Not Functional 24. . . . . . . . . . . . . . . . . .
Advisory 2.0.3 DMA Channel 0 Split Mode Combined With autoinitialization Performs Improper
Reinitialization 24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.0.4 DMA/Program Fetch: Cannot DMA into Program Memory From External 24. . . . . . . . . . . . . . . . . . . .
Advisory 2.0.5 Data Access: Parallel Accesses to EMIF or Internal Peripheral Bus Location
Sequenced Wrong 25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.0.7 EMIF: Reserved Fields Have Incorrect Values 25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.0.8 EMIF: SDRAM Refresh/DCAB Not Performed Prior to HOLD Request Being Granted 25. . . . . . . . .
Advisory 2.0.9 McBSP New Block Interrupt Does Not Occur for Start of Block 0 26. . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.0.11 DMA/Internal Data Memory: First Load Data Corrupted When DMA in High Priority 26. . . . . . . . . . .
Advisory 2.0.12 McBSP: FRST Improved in 2.1 over 2.0 26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.0.13 McBSP: XEMPTY Stays Low When DXR Written Late 27. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.0.14 EMIF: Multiple SDRAM CE Spaces: Invalid Access After Refresh 27. . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.0.18 DMA/Internal Data Memory: Conflict Data Corruption 27. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.0.19 EMIF: Data Setup Times 28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Advisory 2.0.24 EMIF Extremely Rare Cases Cause an Improper Refresh Cycle to Occur 28. . . . . . . . . . . . . . . . . . . .
7 Documentation Support 28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .