Filter
Top Products
The regulator IC has a built in reference
voltage which is used by the error amplifier
to set and hold the V+ constant. Solder
connections on the J PRA are used to adjust
V+ in steps of ±1.5V.
The FET drive circuit avoids this problem
by sensing flyback diode conduction. If the
flyback diode conduction is sensed, the low
current start mode is selected. This mode
turns the FET on, to a current of .1A, for not
more than 4uS. If before or during the low
current FET on time, the flyback diode breaks
free, and the FET drain voltage goes down,
the flyback diode voltage comparator will
signal the regulator to permit the FET to be
turned on for a full power cycle. The cycle
after the last low power cycle in the waveform,
on the previous page, is an example of this
condition. The flyback diode voltage
comparator inputs are located at pins 12 & 13
of the C5184. The two resistor dividers ( see
next page ) J10 , J11 and J12 , 134 connect
the comparator across the flyback diode 142 .
The comparator enables the FET drive only
after a 10% voltage drop is measured across
this diode.
Most of the power supply fault conditions
cause the power supply to chirp because the
source of +17V for the C5184 is generated by
the power supply. A special circuit is built
into the C5184, which permits charging the
+17V line filter capacitor with only a very low
load from the C5184. This circuit turns the
rest of the C5184 on only after the voltage at
pin 15 reaches 17V. If the transformer does
not supply at least 12V to this line before the
filter capacitor discharges to 12V, the C5184
turns off. The reason for the audible chirp, is
that, the power supply is not full on for each
cycle which produces a frequency low enough
to hear. See the bottom waveform on the
previous page.
A 0-30 volt @ 1A, DC, isolated power supply
is a tool necessary for trouble shooting
CERONIX monitors. When trouble shooting
the power supply, it can be connected to V-
and the +17V line to keep the power supply
running while checking the voltages and
waveforms to find the fault. Caution, do not
exceed 20 volts on the 17 volt line. It can also
be used to supply the GND to +16V line for
checking the horizontal circuit. If the
horizontal circuit does not work, the power
supply will chirp. Without the horizontal
circuit working, there is not enough load on
the power supply for transformer action to
keep the regulator IC +17V line up to the
minimum of +12V. A quick check for this
condition is to clip a 2-4K @ 10W power
resistor from GND to V+. If the chirping
stops, the horizontal is probably not working.
89
SIMPLIFIED POWER SUPPLY CIRCUIT DESCRIPTION.
Another fault condition exists when the
FET exceeds 5A drain current. This
condition can occur if the oscillator frequency
is too low, the FET drain is shorted to GND or
V+, the transformer has a shorted secondary,
or the core is broken. In these cases the
voltage across the FET source resistor
137
exceeds 1.6V which is sensed by the over
current comparator at pin 11. If pin 11
exceeds 1.6V, the FET drive is set to 0V for
the rest of the cycle. In some cases, this
condition can produce an output waveform
which looks normal, but the voltage across the
load (+127V to GND) would be low or
unstable. A quick check for this condition is
to check the peak voltage across the FET
source resistor. CAUTION; Whenever
connecting a scope ground to V-, be sure that
the other scope probe or common grounded
devices are not connected to the monitor GND.
The heart of the power supply is the
oscillator which supplies the basic timing.
The FET drive is always low during the
negative slope of the oscillator or, when
synchronized, after the start of the sync pulse.
The low to high transition of the FET drive,
pin 10, is determined by the voltage at the
output of the error amplifier. If V+ goes up in
voltage, the error amplifier voltage goes up,
which then intersects the oscillator waveform
at a higher voltage and causes the FET on
time to start later and be shorter. This
negative feedback accomplishes the control
loop of the power supply.
The over voltage protect ( OVP ) circuit,
when activated, turns off the regulator IC
until power is disconnected. This circuit is
connected to the rectified flyback pulse, which
outputs a voltage that is proportional to the
EHT. The circuit's main purpose is to protect
the user against excessive x-ray which is
caused by excessive EHT. The OVP circuit is
also activated if the monitor temperature goes
too high or if too much beam current is
demanded from the FBT. The purpose of the
last two functions is to protect the FBT and
the CRT from component failure on the main
or video boards.
J12 134J10 J11
137
142