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Physical Considerations
2-3
Evaluation Module Layout
2.2 Area 100—Single Device SOIC
Area 100 uses 1xx reference designators, and is compatible with a single op
amp, with or without shutdown, packaged as an 8-pin SOIC. This
surface-mount package is designated by a D suffix in TI part numbers, as in
TxxxxCD, TxxxxID, etc.
Offset nulling can be extremely important in some applications. The EVM
accommodates TI IC op amps that provide this feature. The input offset can
be adjusted by connecting a 100-kΩ potentiometer between terminals 1 and
5 of the device and connecting the wiper to VCC– via a resistor (R101) as
shown below. This resistor is used to fine tune the offset adjustment. For
example, when using the TLC070 or TLC071 device and a 100-kΩ nulling
potentiometer, the offset voltage adjustment is ±10 mV when R101 is 5.6 kΩ
and ±3 mV when R101 is 20 kΩ.
When using the nonshutdown version of the device, pin 8 of the IC is a no
connect.
Figure 2–1 shows the area 100 schematic.
Figure 2–1. Area 100 Schematic—Single Device, SOIC (8 pin)
C107 C108
C105 C104
V1+
V1–
V1+
GND1
V1–
Power Supply Bypass
+
–
1
4
3
2
V1+
V1–
R112
C109
R114
C110
R110
R109
R104
R103
R102
R105
C101
C102
OUT
A101–
A102–
A103+
A104+
U101
SD
C103
R106
A1 FLT
6
8
7
5
R101
R111
U102
R113
Voltage Reference
V1+ VREF1
R108
C106
V1–
R107