Filter
Top Products
3-6
Chapter 3, TECHNICAL DESCRIPTION
There is one situation where this automatic correction might not be sufficient to give
good performance. Consider the case where the signal being measured is at 73 kHz,
which is 10 kHz away from half the sampling frequency. If there were also a strong
interfering signal at 93 kHz (i.e. 166 kHz/2 + 10 kHz), then an alias of this would
give rise to a spurious output. Note that under these circumstances, the reference
frequency is not sufficiently close to half the sampling frequency to cause the latter to
be automatically adjusted. The problem is overcome by providing the Sample Rate
control which allows the user to adjust the main ADC sampling rate in steps of about
1 %. A 1 % change moves the alias by about 1 kHz, which is normally sufficient to
ensure rejection by the output low-pass filters and thereby remove any error.
The output from the converter feeds the first of the digital signal processors, which
implements the digital multiplier and the first stage of the output low-pass filtering
for each of the X and Y channels.
3.2.07 Reference Channel DSP
The second DSP in the instrument is responsible for implementing the reference
trigger/phase-locked loop, digital phase shifter and internal oscillator look-up table
functional blocks on the block diagram. The processor generates two main outputs,
the first being a series of phase values which are used to drive the other DSP’s
reference channel input and the second being a sinusoidal signal which may be used
as the instrument’s internal oscillator output.
The normal operating mode of the instrument incorporates two reference frequency
ranges, namely the baseband from 1 mHz to 60 kHz and the highband from 60 kHz to
120 kHz. Different hardware configurations are used in the two bands, transitions
between which are made automatically according to the value of the reference
frequency. These transitions are generally transparent to the user.
External Reference Mode
In external reference mode at frequencies above 300 mHz, the reference source may
be applied to either a general purpose input, designed to accept virtually any periodic
waveform with a 50:50 mark-space ratio and of suitable amplitude, or to a TTL-logic
level input. At frequencies below 300 mHz the TTL-logic level input must be used.
Following the trigger buffering circuitry the reference signal is passed to a digital
phase-locked loop (PLL) implemented in the reference DSP. This measures the
period of the applied reference waveform and from this generates the phase values.
Internal Reference Mode
With internal reference operation in the baseband mode (i.e. at reference frequencies
< 60 kHz), the reference processor is free-running at the selected reference frequency
and is not dependent on a phase-locked loop (PLL), as is the case in most other lock-
in amplifiers. Consequently, the phase noise is extremely low, and because no time is
required for a PLL to acquire lock, reference acquisition is immediate. See appendix
A for numerical values of phase noise.
In the internal reference highband mode (i.e. reference frequencies > 60 kHz), the
instrument essentially operates as if in external mode, except that the reference
trigger input is now provided by an internal link from the output of the direct digital
synthesizer.