Filter
Top Products
Power Management
www.ti.com
1.5.3.2.2 Peripheral Clock Stop Request/Acknowledge Register (CLKSTOP) [1C3Ah]
You must execute a handshaking procedure before stopping the clock to the EMIF, USB, and UART. This
handshake procedure ensures that current bus transactions are completed before the clock is stopped.
The peripheral clock stop request/acknowledge register (CLKSTOP) enables this handshaking
mechanism.
To stop the clock to the EMIF, USB, or UART, set the corresponding clock stop request bit in the
CLKSTOP register, then wait for the peripheral to set the corresponding clock stop acknowledge bit. Once
this bit is set, you can idle the corresponding clock in the PCGCR1 and PCGCR2.
To enable the clock to the EMIF, USB, or UART, first enable the clock the peripheral through PCGCR1 or
PCGCR2, then clear the corresponding clock stop request bit in the CLKSTOP register.
The peripheral clock stop request/acknowledge register (CLKSTOP) is shown in Figure 1-16 and
described in Table 1-26.
Figure 1-16. Peripheral Clock Stop Request/Acknowledge Register (CLKSTOP) [1C3Ah]
15 8
Reserved
R-0
7 6 5 4 3 2 1 0
Reserved URTCLKSTPACK URTCLKSTPREQ USBCLKSTPACK USBCLKSTPREQ EMFCLKSTPACK EMFCLKSTPREQ
R-0 R-1 R/W-1 R-1 R/W-1 R-1 R/W-1
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 1-26. Peripheral Clock Stop Request/Acknowledge Register (CLKSTOP) Field Descriptions
Bit Field Value Description
15-6 Reserved 0 Reserved.
5 URTCLKSTPACK UART clock stop acknowledge bit. This bit is set to 1 when the UART has acknowledged
a request for its clock to be stopped. The UART clock should not be stopped until this bit
is set to 1.
0 The request to stop the peripheral clock has not been acknowledged.
1 The request to stop the peripheral clock has been acknowledged, the clock can be
stopped.
4 URTCLKSTPREQ UART peripheral clock stop request bit. When disabling the UART internal peripheral
clock, you must set this bit to 1 to request permission to stop the clock. After the UART
acknowledges the request (URTCLKSTPACK = 1) you can stop the clock through the
peripheral clock gating control register 1 (PCGCR1). When enabling the UART internal
clock, enable the clock through PCGCR1, then set URTCKLSTPREQ to 0.
0 Normal operating mode.
1 Request permission to stop the peripheral clock.
3 USBCLKSTPACK USB clock stop acknowledge bit. This bit is set to 1 when the USB has acknowledged a
request for its clock to be stopped. The USB clock should not be stopped until this bit is
set to 1.
0 The request to stop the peripheral clock has not been acknowledged.
1 The request to stop the peripheral clock has been acknowledged, the clock can be
stopped.
2 USBCLKSTPREQ USB peripheral clock stop request bit. When disabling the USB internal peripheral clock,
you must set this bit to 1 to request permission to stop the clock. After the USB
acknowledges the request (USBCLKSTPACK = 1) you can stop the clock through the
peripheral clock gating control register 2 (PCGCR2). When enabling the USB internal
clock, enable the clock through PCGCR2, then set USBCKLSTPREQ to 0.
0 Normal operating mode.
1 Request permission to stop the peripheral clock.
42
System Control SPRUFX5A–October 2010–Revised November 2010
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated