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zero (0) sets the impedance to 75Ω. Setting bit 2 to one (1) sets the
impedance of the inverting output to 50
Ω. Setting bit 2 to zero (0) sets
the impedance to 75
Ω. At power-on, the impedance of both outputs is
undefined.
Bit 1. Setting bit 1 to one (1) sets the ’Main’ output impedance to 0
Ω.
Setting bit 1 to zero (0) opens the 0Ω path. The output attenuation must
be set to 0 dB (bit 7) if the impedance is set to 0
Ω. Bit 5 must also be set
to one (1) to get 0
Ω output impedance. At power-on, the ’Main’ output
impedance is undefined.
Bit 0. Bit 0 is a reserved bit and must remain set to one (1). At
power-on, the bit setting is undefined.
The Input
Attenuation Register
The Input Attenuation register controls the attenuation and impedance
of the amplifier’s inputs (’Input 1’ and ’Input 2’).
Address 1514131211109876543210
Input 1 attenuation and impedance X Input 2 attenuation and impedance
base + 0C
16
16dB
atten
8dB
atten
4dB
atten
2dB
atten
1dB
atten
75
Ω
in
imp
50
Ω
in
imp
not
used
16dB
atten
8dB
atten
4dB
atten
2dB
atten
1dB
atten
75
Ω
in
imp
50
Ω
in
imp
relay
act.
Bits 15 - 11. Bits 15 - 11 set the ’Input 1’ attenuation from 0dB to 31dB.
Zeros (0) in bits 15 - 11 set 0dB attenuation. Ones (1) in bits 15 - 11 set
up to 31dB of attenuation. At power-on, the input attenuation is
undefined.
Bits 10 - 9. Bits 10 - 9 set the input impedance of ’Input 1’. Setting bit
10 to one (1) sets the impedance to 75
Ω. Setting bit 9 to one (1) sets the
impedance to 50
Ω. If both bits are set to one (1), the impedance is 50Ω.
Setting both bits to zero (0) sets the input impedance to 1 M
Ω. At
power-on, the input impedance is undefined.
Bits 7 - 3. Bits 7 - 3 set the ’Input 2’ attenuation from 0dB to 31dB.
Zeros (0) in bits 7 - 3 set 0dB attenuation. Ones (1) in bits 7 - 3 set up to
31dB of attenuation. At power-on, the input attenuation is undefined.
Bits 2 - 1. Bits 2 - 1 set the input impedance of ’Input 2’. Setting bit 2 to
one (1) sets the impedance to 75
Ω. Setting bit 1 to one (1) sets the
impedance to 50
Ω. If both bits are set to one (1), the impedance is 50Ω.
Setting both bits to zero (0) sets the input impedance to 1 M
Ω. At
power-on, the input impedance is undefined.
C-10 Register-Based Programming Register Descriptions