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DSP56366 Bootstrap Program
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
A-4 Freescale Semiconductor
;;
;;;;;;;;;;;;;;;;;;;; DSP I/O REGISTERS ;;;;;;;;;;;;;;;;;;;;;;;;
;;
M_AAR1 EQU $FFFFF8 ; Address Attribute Register 1
M_OGDB EQU $FFFFFC ; OnCE GDB Register
M_HPCR EQU $FFFFC4 ; Host Polarity Control Register
M_HSR EQU $FFFFC3 ; Host Status Register
M_HORX EQU $FFFFC6 ; Host Receive Register
HRDF EQU $0 ; Host Receive Data Full
HF0 EQU $3 ; Host Flag 0
HEN EQU $6 ; Host Enable
M_HRX EQU $FFFF94 ; SHI Receive FIFO
M_HCSR EQU $FFFF91 ; SHI Control/Status Register
M_HCKR EQU $FFFF90 ; SHI Clock Control Register
HRNE EQU 17 ; SHI FIFO Not Empty flag
HI2C EQU 1 ; SHI I2C Enable Control Bit
HCKFR EQU 4 ; SHI I2C Clock Freeze Control Bit
HFM0 EQU 12 ; SHI I2C Filter Mode Bit 0
HFM1 EQU 13 ; SHI I2C Filter Mode Bit 1
ORG PL:$ff0000,PL:$ff0000 ; bootstrap code starts at $ff0000
START
movep #$0,X:M_OGDB ; enable OnCE
nop ; 5 NOP instructions, needed for test procedure
nop
nop
nop
nop
clr a #$0,r5 ; clear a and init R5 with 0
jset #MD,omr,OMR1XXX ; If MD:MC:MB:MA=1xxx go to OMR1XXX
jset #MC,omr,SHILD ; If MD:MC:MB:MA=01xx, go load from SHI
jclr #MB,omr,EPROMLD ; If MD:MC:MB:MA=0001, go load from EPROM
jset #MA,omr,RESERVED ; If MD:MC:MB:MA=0011, go to RESERVED
;========================================================================
; This is the routine that jumps to the internal Program ROM.
; MD:MC:MB:MA=0010
move #PROMADDR,r1 ; store starting PROM address in r1
bra <FINISH
;========================================================================
; This is the routine that loads from SHI.
; MD:MC:MB:MA=0100 - reserved for SHI
; MD:MC:MB:MA=0101 - Bootstrap from SHI (SPI slave)
; MD:MC:MB:MA=0110 - Bootstrap from SHI (I2C slave, HCKFR=1,100ns filter)
; MD:MC:MB:MA=0111 - Bootstrap from SHI (I2C slave, HCKFR=0)