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DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
D-44 Freescale Semiconductor
Figure D-29. DAX Control and Status Registers
XBLK DAX Block transfer
0 not last frame
1 191st frame transmission
DAX
15 14 13 12
11109876543210
DAX Control
X:$FFFFD0
Reset = $000000
Register (XCTR)
*
0
*
0
*
0
*
0
*
0
*
= Reserved; write as 0
1617181920212223
*
0
*
0
*
0
*
0
*
0
*
0
*
0
XCS1 XCS0 XBIE XUIE XDIE
15 14 13 12
11 10 9 8 7 6 5 4 3 2 1 0
*
0
*
0
*
0
*
0
*
0
*
0
1617181920212223
*
0
*
0
*
0
*
0
*
0
*
0
*
0
XBLK
XADE
*
0
*
0
*
0
*
0
*
0
*
0
XCS1 XCS0 DAX Clock Source
0 0 DSP Core Clock (f = 1024 x fs)
0 1 ACI Pin, f = 256 x fs
1 0 ACI Pin, f = 384 x fs
1 1 ACI Pin, f = 512 x fs
DAX Status
X:$FFFFD4
Reset = $000000
Register (XSTR)
XADE DAX Audio Data Empty
0 Register(s) full
1 Register(s) empty
XAUR DAX Underrun error
0No error
1 Underrun error
*
0
*
0
*
0
*
0
*
0
*
0
*
0
*
0
XAUR
XBIE DAX Block Trans. Int. Enable
0Disabled
1 Enabled
XUIE DAX Underrun Int. Enable
0 Disabled
1 Enabled
XDIE Aud. Dat. Reg. Emp. Int. En.
0 Disabled
1 Enabled
XSB DAX Start Block
0 Disabled
1 Force Block Start
XSB
Application:
D
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Programmer: