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Section
VII
Model
3490A
Table
7-6.
Alphabetical
Listing
of
34g0A
Mnemonics.
Mnemonic
Description
LACI
AC input
enabte
LACO
AC conwrter
output
switch
HAUT
Internal
autorange
HAZD
Analog zero
detect
LCDC
Clear
data
counter
HCOC
Clear data
counter
LCDF
Change
data ftag
(HDFL)
lgER
Change
end
of reading
{LEORI
HCES
Close
electronic
switch
f9!C
Change hundred
thousnd
count
select
f9yA
Change
main
time
bit
A
(HMTA)
i9yg
chanse
main
time
bit
B
(HMTB)
l9yc
Chanse
main
time
bir
C
(HMTC)
LCOV
Ctock
overtoad
HCRA
Combined
range
brt
A
HCRB
Combined
range
bit
B
HCRC
Combined
range
brr
C
LCSO
Clear
stord
outpurs
LCTC
Clear
time
@unter
HDCA
Data
Counter
bit
A
LIR
Xt
Atten reed
HIRA
Internal
range
bit
A
HIBB
Internal
rarEe
bit
g
HIRC
Internal
range
bit
C
LLEC
Leakage
control
HMA
Machine
state
bir
A
HMB
Machine
state
bit
B
HMC
Machine
state
bit
C
HMD
Machine
state
bit
D
ly9A
Main
time
bit
A detayed
Iy?q
Main
time
bit
B
detayed
Iy?C
Main
time
bit
C detayed
HME
Machine
state
bit
E
HMF
Machine
state
bit F
HMG
Machine
state
bit
G
ryryg
Manual
button
normaly
ctosed
contact
ly!9
Manuat
button
normaily
open
contact
LMOT
Memory
output
llygf
Machine
quatifier
setection
bir
A
ly99
Machine
quatifier
setectaon
bit
B
ly99
Machine
quatifier
set&tion
bir
C
lIgD
Machine
quatifier
setection
bit D
.:yy?
Machine
quatifier
setection
bit
D
:y:_a
Machine
quatifier
setection
bit
E
:yy:
Machine
quatif
ier
setection
bit
E
LMRF -
Ref
select
HOCB
Data
Counter
bit
B
HDCC
Data
Counter
bit
C
HDCD
Data
Counter
bit
D
HOFL
Data
Fte
LDNR
DownraÄe
HDPP
Oisplay p-olaritv
Source
Mnemonic
Description
Aru4ot
lr_eOn
Al u401
|
r_exe
From
HFAT
or
Al
1 U1
I
I
grar
41U203
|
rrra
41U16
|
Hrra
A1U23
|
xrne
Alu16
|
nrne
A1U16
|
srnc
Alus
l
nrsc
(HSHC)
U16
t
LFTX
u16
l
r-nrvc
u16
llrr_o
u16
llre
u16
lHrre
54 or
AtlU1
I
I
Hrre
S4orA11U11
lltC
54orAllul1
ltrnrp
Y19 |
r-r'vs
Yl6 |
r-roc
ul
I
ilr.are
u401
|
xMre
u21
|
xrvrrC
u2t
I
lore
u21
|
lorn
u4o1
|
r-orurn
Next
stare
outputs
from
I
iors
BOM
U9,
present
state
I
frovp
outpurs
from
state
I
Hovt_
storage
U7,
U
17.
I
f_pnf
From
Sample/Hotd
option
I
f_pnC
if not
instailed
these
signats
I
ffnep
aresmeasHMTA,B,C.
I
HSn
(se
HMAI
I
HSe
(See
HMA)
|
rSC
(See
HMA)
|
HSCK
s58
|
LScx
ssB
I
1-5nc
r,!r
I
usnc
ulo
I
r_spr_
ulo
I
usse
u10
|
HSSB
u10
|
HSSC
ue
I
lrcr
uto
I
Hrcz
u9
|
srca
u401
ul
I
Hrcl6
.
ul
I
Hrca2
ul
"
I
Hrrs
uzo
I
LTXF
u16
I
lroru
U22
or
Rario
or
I
r-Upn
s/H
oprion
I
nzof
End
of reading
External
encode
Front panel
autorange
Front
panel
function
bit A
Front panel
function
bit
B
Front
panel
range
bit
A
Front
panel
range
bit
g
Front
panel
range
bit
C
Fast
state
clock
False
transfer
Xl0O
Gain
Hold
(stops
interwl
sampting)
Xl
Atten
Internal
function
bit
A
Internat
function
bit
B
X1
Gain
Input
polarity
Input
short
X10
Gain
Main
time
bit
A
Main
time.bit
B
Main
time
bit
C
X0.01
Atten
X0.01
Atten,
reed
Ohms ref
select
Output
enable
to
decoder
Overload
protection
O\rerload
+
Ref
select
Preset
range
Ratio
polarity
Display
scan
A
Display
scan
B
Oisplay
scan
C
State
clock
State
clock
Select
+
100,000
counts
Select
+
1OO,0OO
@unts
Store
polarity
Sample
rate
switch
bit
A
Sample
rate
sitcfi
bit
B
Sample rate
ilitch
bit
C
Time
count
1
(+
l0,OO0
or
+l@,OOOI
Time
count
2
Time
count
4
Time
count
I
Time
count
l6
Time
count
32
Transfer
enable
Transfer
Turnon,
low
for
approx.
100
ms
after
turn-on
Uprange
Zero detect
Source
u14
422U1
s4A
S3
s3
54 or
A11U11
54orAltUl1
54or41tU11
U3
u16
u401
S5A
or
A22U
l
u401
From
53 or
At
t UlO
From
53 or
At l
UtO
u401
U2?
u401
u40l
ul4
ul1
ul
1
u401
u401
u401
U9
u401
u22
u401
ul6
U22
or
Ratio
option
A3U2
A3U2
43U2
v4
U4
U6
U6
ul6
s5A
s5B
s5c
Q1
U6
u12
u12
vl2
U9
u18
o3
ul6
u23
H
preceding
mnemonic
means
HIGH
is
true;
L means
LOW
is
true.
-
1i,