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Add Two Single-Precision Floating-Point Values ADDSP
3-61 Instruction SetSPRU733
Notes:
1) This instruction takes the rounding mode from and sets the warning bits
in FADCR, not FAUCR as for other .S unit instructions.
2) If rounding is performed, the INEX bit is set.
3) If one source is SNaN or QNaN, the result is NaN_out. If either source
is SNaN, the INVAL bit is set also.
4) If one source is +infinity and the other is −infinity, the result is NaN_out
and the INVAL bit is set.
5) If one source is signed infinity and the other source is anything except
NaN or signed infinity of the opposite sign, the result is signed infinity and
the INFO bit is set.
6) If overflow occurs, the INEX and OVER bits are set and the results are
rounded as follows (LFPN is the largest floating-point number):
Overflow Output Rounding Mode
Result Sign Nearest Even Zero +Infinity −Infinity
+ +infinity +LFPN +infinity +LFPN
− −infinity −LFPN −LFPN −infinity
7) If underflow occurs, the INEX and UNDER bits are set and the results
are rounded as follows (SPFN is the smallest floating-point number):
Underflow Output Rounding Mode
Result Sign Nearest Even Zero +Infinity −Infinity
+ +0 +0 +SFPN +0
− −0 −0 −0 −SFPN
8) If the sources are equal numbers of opposite sign, the result is +0 unless
the rounding mode is −infinity, in which case the result is −0.
9) If the sources are both 0 with the same sign or both are denormalized
with the same sign, the sign of the result is negative for negative sources
and positive for positive sources.
10) A signed denormalized source is treated as a signed 0 and the DENn bit
is set. If the other source is not NaN or signed infinity, the INEX bit is also
set.