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Compare for Equality, Signed Integers CMPEQ
3-81 Instruction SetSPRU733
Pipeline
Stage
E1
Read src1, src2
Written dst
Unit in use
.L
Instruction Type Single-cycle
Delay Slots 0
See Also CMPEQDP, CMPEQSP, CMPGT, CMPLT
Example 1
CMPEQ .L1X A1,B1,A2
Before instruction 1 cycle after instruction
A1
0000 04B8h 1208 A1 0000 04B8h
A2 xxxx xxxxh A2 0000 0000h false
B1 0000 04B7h 1207 B1 0000 04B7h
Example 2 CMPEQ .L1 Ch,A1,A2
Before instruction 1 cycle after instruction
A1
0000 000Ch
12 A1 0000 000Ch
A2 xxxx xxxxh A2 0000 0001h true
Example 3 CMPEQ .L2X A1,B3:B2,B1
Before instruction 1 cycle after instruction
A1
F23A 3789h
A1 F23A 3789h
B1 xxxx xxxxh B1 0000 0001h true
B3:B2 0000 00FFh F23A 3789h B3:B2 0000 00FFh F23A 3789h
Pipeline