Texas Instruments TMS320C67X/C67X+ DSP Car Speaker User Manual

Individual Interrupt Control
5.3 Individual Interrupt Control
Servicing interrupts effectively requires individual control of all three types of
interrupts: reset, nonmaskable, and maskable. Enabling and disabling individ-
ual interrupts is done with the interrupt enable register (IER). The status of
pending interrupts is stored in the interrupt flag register (IFR). Manual interrupt
processing can be accomplished through the use of the interrupt set register
(ISR) and interrupt clear register (ICR). The interrupt return pointers restore
context after servicing nonmaskable and maskable interrupts.
5.3.1 Enabling and Disabling Interrupts
You can enable and disable individual interrupts by setting and clearing bits
in the IER that correspond to the individual interrupts. An interrupt can trigger
interrupt processing only if the corresponding bit in the IER is set. Bit 0,
corresponding to reset, is not writeable and is always read as 1, so the reset
interrupt is always enabled. You cannot disable the reset interrupt. Bits
IE4IE15 can be written as 1 or 0, enabling or disabling the associated
interrupt, respectively. The IER is shown in Figure 27 (page 2-17) and
described in Table 29.
When NMIE = 0, all nonreset interrupts are disabled, preventing interruption
of an NMI. The NMIE bit is cleared at reset to prevent any interruption of
process or initialization until you enable NMI. After reset, you must set the
NMIE bit to enable the NMI and to allow INT15INT4 to be enabled by the GIE
bit in CSR and the corresponding IER bit. You cannot manually clear the NMIE
bit; the NMIE bit is unaffected by a write of 0. The NMIE bit is also cleared by
the occurrence of an NMI. If cleared, the NMIE bit is set only by completing a
B NRP instruction or by a write of 1 to the NMIE bit. Example 54 and
Example 55 show code for enabling and disabling individual interrupts,
Example 54. Code Sequence to Enable an Individual Interrupt (INT9)
MVK 200h,B1 ; set bit 9
MVC IER,B0 ; get IER
OR B1,B0,B0 ; get ready to set IE9
MVC B0,IER ; set bit 9 in IER
Example 55. Code Sequence to Disable an Individual Interrupt (INT9)
MVK FDFFh,B1 ; clear bit 9
AND B1,B0,B0 ; get ready to clear IE9
MVC B0,IER ; clear bit 9 in IER