Control Register File
2-11CPU Data Paths and ControlSPRU733
Table 2−5. Addressing Mode Register (AMR) Field Descriptions (Continued)
Bit DescriptionValueField
13−12 B6 MODE 0−3h Address mode selection for register file B6.
0 Linear modification (default at reset)
1h Circular addressing using the BK0 field
2h Circular addressing using the BK1 field
3h Reserved
11−10
B5 MODE 0−3h Address mode selection for register file B5.
0 Linear modification (default at reset)
1h Circular addressing using the BK0 field
2h Circular addressing using the BK1 field
3h Reserved
9−8
B4 MODE 0−3h Address mode selection for register file B4.
0 Linear modification (default at reset)
1h Circular addressing using the BK0 field
2h Circular addressing using the BK1 field
3h Reserved
7−6
A7 MODE 0−3h Address mode selection for register file A7.
0 Linear modification (default at reset)
1h Circular addressing using the BK0 field
2h Circular addressing using the BK1 field
3h Reserved
5−4
A6 MODE 0−3h Address mode selection for register file A6.
0 Linear modification (default at reset)
1h Circular addressing using the BK0 field
2h Circular addressing using the BK1 field
3h Reserved