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ADD2 Add Two 16-Bit Integers on Upper and Lower Register Halves
3-66 Instruction Set SPRU733
Execution if (cond) {
msb16(src1) + msb16(src2) → msb16(dst);
lsb16(src1) + lsb16(src2) → lsb16(dst);
}
else nop
Pipeline
Stage
E1
Read src1, src2
Written dst
Unit in use
.S
Instruction Type Single-cycle
Delay Slots 0
See Also ADD, ADDU, SUB2
Example
ADD2 .S1X A1,B1,A2
Before instruction 1 cycle after instruction
A1
0021 37E1h 33 14305 A1 0021 37E1h
A2 xxxx xxxxh A2 03BB 1C99h 955 7321
B1 039A E4B8h 922 58552 B1 039A E4B8h
Pipeline