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Index-3SPRU733
compare for equality
floating-point
double-precision values (CMPEQDP) 3-82
single-precision values (CMPEQSP) 3-84
signed integers (CMPEQ) 3-80
compare for greater than
floating-point
double-precision values (CMPGTDP) 3-89
single-precision values (CMPGTSP) 3-91
signed integers (CMPGT) 3-86
unsigned integers (CMPGTU) 3-93
compare for less than
floating-point
double-precision values (CMPLTDP) 3-98
single-precision values (CMPLTSP) 3-100
signed integers (CMPLT) 3-95
unsigned integers (CMPLTU) 3-102
conditional operations 3-19
conditional subtract and shift (SUBC) 3-258
conditions for processing a nonreset interrupt 5-16
constraints
.D unit
LDDW instruction with long write
instruction 4-55
load instruction 4-52
single-cycle instruction 4-54
store instruction 4-53
.L unit
4-cycle instruction 4-49
ADDDP instruction 4-51
INTDP instruction 4-50
single-cycle instruction 4-48
SUBDP instruction 4-51
.M unit
4-cycle instruction 4-41
MPYDP instruction 4-44
MPYI instruction 4-42
MPYID instruction 4-43
MPYSP instruction 4-45
MPYSPDP instruction 4-46
MPYSP2DP instruction 4-47
multiply instruction 4-40
.S unit
2-cycle DP instruction 4-36
ADDDP instruction 4-38
ADDSP instruction 4-37
branch instruction 4-39
DP compare instruction 4-35
single-cycle instruction 4-34
SUBDP instruction 4-38
SUBSP instruction 4-37
on cross paths 3-21
on floating-point instructions 3-26
on instructions using the same functional
unit 3-20
on loads and stores 3-22
on long data 3-23
on register reads 3-24
on register writes 3-25
on the same functional unit writing in the same
instruction cycle 3-20
pipeline 4-33
control, individual interrupts 5-13
control register, interrupts 5-10
control status register (CSR) 2-13
convert
double-precision floating-point value
to integer (DPINT) 3-104
to integer with truncation (DPTRUNC) 3-108
to single-precision floating-point value
(DPSP) 3-106
signed integer
to double-precision floating-point value
(INTDP) 3-117
to single-precision floating-point value
(INTSP) 3-121
single-precision floating-point value
to double-precision floating-point value
(SPDP) 3-226
to integer (SPINT) 3-228
to integer with truncation (SPTRUNC) 3-230
unsigned integer
to double-precision floating-point value
(INTDPU) 3-119
to single-precision floating-point value
(INTSPU) 3-122
CPU
control register file 2-7
control register file extensions 2-23
data paths 2-3
functional units 2-5
general-purpose register files 2-2
introduction 1-8
load and store paths 2-6
CPU data paths
relationship to register files 2-6
TMS320C67x DSP 2-3
CPU ID bits 2-13