Texas Instruments TMS320C67X/C67X+ DSP Car Speaker User Manual

LDB(U) Load Byte From Memory With a 5-Bit Unsigned Constant Offset or Register Offset
3-124 Instruction Set SPRU733
The addressing arithmetic that performs the additions and subtractions
defaults to linear mode. However, for A4A7 and for B4B7, the mode can be
changed to circular mode by writing the appropriate value to the AMR
(see section 2.7.3, page 2-10).
For LDB(U), the values are loaded into the 8 LSBs of dst. For LDB, the upper
24 bits of dst values are sign-extended; for LDBU, the upper 24 bits of dst are
zero-filled. The s bit determines which file dst will be loaded into: s = 0 indicates
dst will be loaded in the A register file and s = 1 indicates dst will be loaded in
the B register file. The r bit should be cleared to 0.
Increments and decrements default to 1 and offsets default to 0 when no
bracketed register or constant is specified. Loads that do no modification to the
baseR can use the syntax *R. Square brackets, [ ], indicate that the ucst5 offset
is left-shifted by 0. Parentheses, ( ), can be used to set a nonscaled, constant
offset. You must type either brackets or parentheses around the specified
offset, if you use the optional offset parameter.
Execution if (cond) mem
else nop
E1 E2 E3 E4 E5
Read baseR
Written baseR dst
Unit in use
Instruction Type Load
Delay Slots 4 for loaded value
0 for address modification from pre/post increment/decrement
For more information on delay slots for a load, see Chapter 4.
See Also LDH, LDW