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Store Halfword to Memory With a 15-Bit Unsigned Constant Offset STH
3-243 Instruction SetSPRU733
Store Halfword to Memory With a 15-Bit Unsigned Constant Offset
STH
Syntax STH (.unit) src, *+B14/B15[ucst15]
.unit = .D2
Compatibility C62x, C64x, C67x, and C67x+ CPU
Opcode
31 29 28 27 23 22 876 43210
creg z src ucst15 y 1 0 1 1 1 s p
3 1 5 15 1 1 1
Description Stores a halfword to memory from a general-purpose register (src). The
memory address is formed from a base address register B14 (y = 0) or
B15 (y = 1) and an offset, which is a 15-bit unsigned constant (ucst15). The
assembler selects this format only when the constant is larger than five bits in
magnitude. This instruction executes only on the .D2 unit.
The offset, ucst15, is scaled by a left-shift of 1 bit. After scaling, ucst15 is added
to baseR. The result of the calculation is the address that is sent to memory.
The addressing arithmetic is always performed in linear mode.
For STH, the 16 LSBs of the src register are stored. src can be in either register
file. The s bit determines which file src is read from: s = 0 indicates src is in the
A register file and s = 1 indicates src is in the B register file.
Square brackets, [ ], indicate that the ucst15 offset is left-shifted by 1.
Parentheses, ( ), can be used to set a nonscaled, constant offset. You must
type either brackets or parentheses around the specified offset, if you use the
optional offset parameter.
Halfword addresses must be aligned on halfword (LSB is 0) boundaries.
Execution if (cond) src
→ mem
else nop
Note:
This instruction executes only on the B side (.D2).