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Multiply Signed 16 MSB x Signed 16 MSB With Left Shift and Saturation SMPYH
3-221 Instruction SetSPRU733
Multiply Signed 16 MSB Signed 16 MSB With Left Shift and Saturation
SMPYH
Syntax SMPYH (.unit) src1, src2, dst
.unit = .M1 or .M2
Compatibility C62x, C64x, C67x, and C67x+ CPU
Opcode
31 292827 2322 1817 131211 76543210
creg z dst src2 src1 x 0 0 0 1 0 0 0 0 0 0 s p
3 1 5 5 5 1 1 1
Opcode map field used... For operand type... Unit
src1
src2
dst
smsb16
xsmsb16
sint
.M1, .M2
Description The src1 operand is multiplied by the src2 operand. The result is left shifted
by 1 and placed in dst. If the left-shifted result is 8000 0000h, then the result
is saturated to 7FFF FFFFh. If a saturation occurs, the SAT bit in CSR is set
one cycle after dst is written. The source operands are signed by default.
Execution if (cond) {
if (((src1
src2) << 1) != 8000 0000h)
((src1
src2) << 1) → dst
else
7FFF FFFFh
→ dst
}
else nop
Pipeline
Stage
E1 E2
Read src1, src2
Written dst
Unit in use
.M
Instruction Type Single-cycle (16 × 16)
Delay Slots 1
See Also MPYH, SMPY, SMPYHL, SMPYLH
Pipeline