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Control Register File Extensions
2-25CPU Data Paths and ControlSPRU733
Table 2−14. Floating-Point Adder Configuration Register (FADCR)
Field Descriptions (Continued)
Bit DescriptionValueField
20 INVAL
0 A signed NaN (SNaN) is not a source.
1 A signed NaN (SNaN) is a source. NaN is a source in a floating-point to integer
conversion or when infinity is subtracted from infinity.
19
DEN2 Denormalized number select for .L2 src2.
0 src2 is not a denormalized number.
1 src2 is a denormalized number.
18
DEN1 Denormalized number select for .L2 src1.
0 src1 is not a denormalized number.
1 src1 is a denormalized number.
17
NAN2 NaN select for .L2 src2.
0 src2 is not NaN.
1 src2 is NaN.
16
NAN1 NaN select for .L2 src1.
0 src1 is not NaN.
1 src1 is NaN.
15−11
Reserved 0 Reserved. The reserved bit location is always read as 0. A value written to this
field has no effect.
10−9 RMODE 0−3h Rounding mode select for .L1.
0 Round toward nearest representable floating-point number
1h Round toward 0 (truncate)
2h Round toward infinity (round up)
3h Round toward negative infinity (round down)
8
UNDER Result underflow status for .L1.
0 Result does not underflow.
1 Result underflows.